di3245l1.txt
;*****************************************************************************
;
; LISTING 1
;
; "Simple emulator speeds testing," EDN, September 25, 2003, pg 67
;
;*****************************************************************************
'16 bit "ISA" BUS EMULATOR BS2 FIRMWARE
'
'constants declarations
B96 con $54	'baudmode for 9600-bps comms, pgm port.
pgm con 16	'pin number of programming port
AddPin con 0    'pin to shift out address data
AddClk con 1    'pin to clock add out
DataPino con 2  'pin to shift out datao
DataClko con 3  'pin to clock datao
DataPini con 4  'pin for Data read
DataClki con 5  'Pin for Data read clock
Latch_en con 9  'pin for RData Reg Latch Enb (active low)
Dir      con 10 ' pin for Dir signal
rd_l     con 12 'pin for read low signal
wr_l     con 13 'pin for write low signal
bale     con 14 'pin for Address latch Enable 
Endir    con 15 'pin for Endir signal

'variable declarations
r_w	  var byte	'read/write byte
val       var word     '4 nib Hex address or data to shift out 

serout pgm,B96,[CR,CR,CR,CR,CR,CR,CR,CR,CR,CR,CR,CR,CR]
serout pgm,B96,[CR, "ISA BUS EMULATOR"]
serout pgm,B96,[CR, "----------------"]
serout pgm,B96,[CR,CR, "Follow the following Format:"]
serout pgm,B96,[CR, ">Acc: (r)ead/(w)rite "]
serout pgm,B96,[CR, ">Add: Address(Hex)"]
serout pgm,B96,[CR, ">Dat: Data(Hex) (Write only)",CR,CR]

main:

'set default values on output pins
Low bale
High rd_l
High wr_l
High Endir
High DataPino
Low Dir
High Latch_en

serout pgm,B96,[">"]
serout pgm,B96,[CR, ">Acc:"]

serin pgm,B96,[r_w]

if r_w = 114  Then  read_acc 'ASCII for "r"
if r_w = 119  Then  write_acc 'ASCII for "w"
 
goto main

read_acc:
   serout pgm,B96,[CR, ">Add:"]
   serin pgm,B96,[HEX val]
   shiftout AddPin,AddClk,msbfirst,[val\16] 'send Add bits to CPLD SR

   'assert BALE low -> high -> low (pulse) 
    High bale
    Low bale

   'set Endir low
    Low Endir

   'set rd_l low
    Low rd_l

   'set latch_en high->low
    Low latch_en

   'Do a dummy read to latch data (provides a clock to sreg)
    shiftin DataPini,DataClki,LSBPOST,[val\2]

   'set latch_en high 
    High latch_en

   'set rd_l high 
    High rd_l

   'set Endir high
    High Endir

   'Do actual read of data
    shiftin DataPini,DataClki,LSBPOST,[val\16]

   'print out read value to screen
    serout pgm,B96,[">Rdat:", HEX val,CR]
 
goto main


write_acc:
   serout pgm,B96,[CR, ">Add:"]
   serin pgm,B96,[HEX val]
   shiftout AddPin,AddClk,msbfirst,[val\16] 'send Add bits to CPLD SR

   serout pgm,B96,[">Dat:"]
   serin pgm,B96,[HEX val]
   shiftout DataPino,DataClko,msbfirst,[val\16] 'send Data bits to CPLD
SR

   'assert BALE low -> high -> low (pulse) 
    High bale
    Low bale

   'set Dir high
   High Dir

   'set wr_l low and then high after 1ms
   Low wr_l
   pause 1
   High wr_l

   'set Dir low again
   Low Dir
goto main