01ms719l5.txt 
;**************************************************************************************************
; LISTING 5 - FREQUENCY-TO-CURRENT CONVERTER MODEL
;
; "Simulating mixed-mode designs with Verilog-only models," EDN, Jan 04, 2000, pg 91

; http://www.ednmag.com/ednmag/reg/2001/0101000/01ms719.htm
;
***************************************************************************************************

// ccontrolmsb signals are mask plug options in the F/I circuit.
always @(‘PLL_SCOPE.MAINICO.ico_fout or ‘FTOI_VREF
or moddepth or en)
begin
if (en)
ftoi_iout = (0.25 + (0.25 * ccontrolmsb[2]) +
(0.25 * ccontrolmsb[1]) + (0.25 * ccontrolmsb[0])) *
(1.0/4.0)*‘FTOI_C*‘FTOI_VREF*
(‘PLL_SCOPE.MAINICO.ftoi_ico_fout/16.0) *
((moddepth[0] * 1.0) + (moddepth[1] * 2.0));
else
ftoi_iout = 0.0;
end